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PCK210 Low voltage dual 1:5 differential ECL/PECL clock driver
Product data Supersedes data of 2002 Apr 11 2002 Nov 13
Philips Semiconductors
Philips Semiconductors
Product data
Low voltage dual 1:5 differential ECL/PECL clock driver
PCK210
FEATURES
* 85 ps part-to-part skew typical * 20 ps output-to-output skew typical * Differential design * VBB output * Voltage and temperature compensated outputs * Low voltage VEE range of -2.25 V to -3.8 V * 75 k input pull-down resistors * Form, fit, and function compatible with MC100EP210
DESCRIPTION
The PCK210 is a low skew 1-to-5 dual differential driver, designed with clock distribution in mind. The input signals can be either differential or single-ended if the VBB output is used. The signal is fanned out to 5 identical differential outputs. The PCK210 is specifically designed, modeled and produced with low skew as the key goal. Optimal design and layout serve to minimize gate-to-gate skew within a device, and empirical modeling is used to determine process control limits that ensure consistent tPD distributions from lot to lot. The net result is a dependable, guaranteed low skew device. To ensure that the tight skew specification is met, it is necessary that both sides of the differential output are terminated into 50 , even if only one side is being used. In most applications, all ten differential pairs will be used, and therefore terminated. In the case where fewer than ten pairs are used, it is necessary to terminate at least the output pairs on the same package side as the pair(s) being used on that side, in order to maintain minimum skew. Failure to do this will result in small degradations of propagation delay (on the order of 10-20 ps) of the output(s) being used, which, while not being catastrophic to most designs, will mean a loss of skew margin. The PCK210, as with most other ECL devices, can be operated from a positive VCC supply in PECL mode. This allows the PCK210 to be used for high performance clock distribution in +3.3 V or +2.5 V systems. Designers can take advantage of the PCK210's performance to distribute low skew clocks across the backplane or the board. In a PECL environment, series or Thevenin line terminations are typically used as they require no additional power supplies. The PCK210 may be driven single-endedly utilizing the VBB bias output with the CLKA or CLKB input. If a single-ended signal is to be used, the VBB pin should be connected to the CLKA or CLKB input and bypassed to ground via a 0.01 F capacitor. The VBB output can only source/sink 0.3 mA, therefore, it should be used as a switching reference for the PCK210 only. Part-to-part skew specifications are not guaranteed when driving the PCK210 single-endedly.
PINNING Pin configuration
VCCO QA0 QA0 QA1 QA1 QA2 QA2 26 VCCO 25
32
31
30
29
28
VCC NC CLKA CLKA VBB CLKB CLKB VEE
1 2 3 4
27
24 QA3 23 QA3 22 QA4 21 QA4
PCK210
5 6 7 8 20 QB0 19 QB0 18 QB1 17 QB1
QB4 10
QB3 12
QB3 13
QB2 14
QB2 15
VCCO 16
VCCO
QB4
11
9
SW00909
Figure 1. Pin configuration
Pin description
SYMBOL VCC NC CLKA, CLKA VBB CLKB, CLKB VEE VCCO QA0-QA4, QB0-QB4 QA0-QA4 , QB0-QB4 PIN 1 2 3, 4 5 6, 7 8 9, 16, 25, 32 31, 29, 27, 24, 22, 20, 18, 15, 13, 11 30, 28, 26, 23, 21, 19, 17, 14, 12, 10 DESCRIPTION Supply voltage Not connected Differential input pair VBB output Differential input pair Ground Output drive power supply voltage Differential outputs Differential outputs
ORDERING INFORMATION
Type number PCK210BD Package Name LQFP32 Description plastic low profile quad flat package; 32 leads; body 7 x 7 x 1.4 mm Version SOT358-1 Temperature range -40 to +70 C
2002 Dec 13
2
Philips Semiconductors
Product data
Low voltage dual 1:5 differential ECL/PECL clock driver
PCK210
LOGIC SYMBOL
QA0 QA0 QA1 CLKA CLKA QA2 QA2 QA3 QA3 QA4 QA4 VBB QA1 CLKB CLKB QB2 QB2 QB3 QB3 QB4 QB4 SW00910 QB0 QB0 QB1 QB1
Figure 2. Logic symbol
ABSOLUTE MAXIMUM RATINGS1
In accordance with the Absolute Maximum Rating System (IEC 134) SYMBOL VCC VI IIN Tstg ESDHBM ESDMM ESDCDM Supply voltage Input voltage Input current Storage temperature range Electrostatic discharge (Human Body Model; 1.5 k, 100 pF) Electrostatic discharge (Machine Model; 0 k, 100 pF) Electrostatic discharge (Charge Device Model) PARAMETER LIMITS MIN -0.3 -0.3 -40 MAX +4.6 VCC + 0.3 20 +125 >1750 >200 >1000 UNIT V V mA C V V V
NOTE: 1. Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute-maximum-rated conditions is not implied.
RECOMMENDED OPERATING CONDITIONS
SYMBOL VCC VIR VDIFF Tamb Supply voltage Receiver input voltage Input differential voltage1 Operating ambient temperature range in free air V(CLKinN)- V(CLKin) PARAMETER CONDITIONS MIN 2.25 VEE -- -40 MAX 3.8 VCC 1.00 +85 UNIT V V V C
NOTE: 1. To idle an unused differential clock input, connect one input terminal (e.g. CLK1) to VBB and leave its complimentary input terminal (e.g. CLK1) open-circuit, in which case CLK1 will default low by its internal pull-down reistor. Inputs should not be shorted to ground or VCC.
THERMAL CHARACTERISTICS
Proper thermal management is critical for reliable system operation. This is especially true for high fan-out and high drive capability products.
2002 Dec 13
3
Philips Semiconductors
Product data
Low voltage dual 1:5 differential ECL/PECL clock driver
PCK210
DC ELECTRICAL CHARACTERISTICS
Vsupply: VCC = VCCO = 0.0 V; VEE = -2.25 V to -3.80 V. SYMBOL IEE ICC IIN VBB VPP VCMR VOH VOL VOUTpp PARAMETER Internal supply current Output and internal supply current Input current Internally generated bias voltage Input amplitude Common mode voltage HIGH-level output voltage LOW-level output voltage Differential output swing CONDITIONS Absolute value of current All outputs terminated 50 to VCC - 2.0 V Includes pull-up/pull-down resistors for VEE = -2.25 V to -3.8 V Difference of input VIH - VIL (Note 1) Crosspoint of input average (VIH, VIL) IOH = -30 mA IOL = -5 mA -40 C
MIN MAX
+25 C
MIN MAX
+85 C
MIN MAX
UNIT mA mA A V V V V V mV
20 270 -1.38 0.5 VEE + 1.0 -1.30 -1.85 350
80 390 150 -1.16 1.3 -0.3 -0.95 -1.40 -
20 270 -1.38 0.5 VEE + 1.0 -
85 395 150 -1.16 1.3 -0.3 -
30 270 -1.38 0.5 VEE + 1.0 -1.20 -1.90 500
90 405 150 -1.16 1.3 -0.3 -0.85 -1.50 -
DC ELECTRICAL CHARACTERISTICS
Vsupply: VCC = VCCO = 2.25 V to 3.80 V; VEE = 0.0 V.
SYMBOL
PARAMETER Internal supply current Output and internal supply current Input current Internally generated bias voltage Input amplitude Common mode voltage HIGH-level output voltage LOW-level output voltage Differential output swing
CONDITIONS Absolute value of current All outputs terminated 50 to VCC - 2.0 V Includes pull-up/ pull-down resistors VCC = 2.25 V to 3.8 V Difference of input VIH - VIL (Note 1) Crosspoint of input average (VIH, VIL) IOH = -30 mA IOL = -5 mA
-40 C
MIN MAX MIN
+25 C
MAX MIN
+85 C
MAX
UNIT mA mA A V V V V V mV
IEE ICC IIN VBB VPP VCMR VOH VOL VOUTpp
20 270 VCC - 1.38
80 390 150
VCC - 1.16
20 270 VCC - 1.38
85 395 150
VCC - 1.16
30 270 VCC - 1.38
90 405 150
VCC - 1.16
0.5 1
VCC - 1.30 VCC - 1.85
1.3 VCC - 0.3
VCC - 0.95 VCC - 1.40
0.5 1 -
1.3 VCC - 0.3 -
0.5 1
VCC - 1.20 VCC - 1.90
1.3 VCC - 0.3
VCC - 0.85 VCC - 1.50
350
-
500
-
NOTE: 1. VPP minimum and maximum required to maintain AC specifications. Actual device function will tolerate minimum VPP of 100 mV.
2002 Dec 13
4
Philips Semiconductors
Product data
Low voltage dual 1:5 differential ECL/PECL clock driver
PCK210
AC CHARACTERISTICS -- PECL input
Vsupply: VCC = VCCO = 2.25 V to 3.80 V; VEE = 0.0 V -ORSYMBOL PARAMETER Differential propagation delay CLK,CLK to all Q0,Q0 through Q4,Q4 Part-to-part skew Output-to-output skew for given part Differential propagation delay CLK,CLK to all Q0,Q0 through Q4,Q4 Part-to-part skew Output-to-output skew for given part Cyle-to-cycle jitter Maximum frequency Output rise and fall times (20%, 80%) Functional to 1.5 GHz Timing specifications apply up to 1.0 GHz (Note 1) CONDITIONS Nominal (single input condition) VPP = 0.650 V, VCMR = VCC - 0.800 V Applies to 500 MHz reference. (Note 1) Single input condition (Note 1) Single input condition (Note 1) All input conditions (Note 1) (Note 1) (Note 1) VCC = VCCO = 0.0 V; VEE = -2.25 V to -3.80 V. -40 C
MIN TYP MAX MIN
+25 C
TYP MAX MIN
+85 C
TYP MAX
UNIT
tPD
270
-
420
300
-
450
380
-
530
ps
tSK(part) tSK(output)
-
15
110 50
-
15
110 50
-
15
110 50
ps ps
tPD tSK(part) tSK(output) tjitter fMAX tr, tf
220 100
15 -
520 160 50 1 1500 320
250 100
15 -
550 160 50 1 1500 320
320 100
15 -
620 160 50 1 1500 320
ps ps ps ns MHz ps
NOTE: 1. For operation with 2.5 V supply, the output termination is 50 to VEE. For operation at 3.3 V supply, the output termination is 50 to VCC - 2 V.
2002 Dec 13
5
Philips Semiconductors
Product data
Low voltage dual 1:5 differential ECL/PECL clock driver
PCK210
LQFP32: plastic low profile quad flat package; 32 leads; body 7 x 7 x 1.4 mm
SOT358-1
2002 Dec 13
6
Philips Semiconductors
Product data
Low voltage dual 1:5 differential ECL/PECL clock driver
PCK210
REVISION HISTORY Rev Date _2 20021213
Description Product data (9397 750 10866); ECN 853-2336 29225 of 22 November 2002. Modifications: * Addition of jitter specification to datasheet. Product data (9397 750 09657); ECN 853-2336 27995 of 11 April 2002.
_1
20020411
2002 Dec 13
7
Philips Semiconductors
Product data
Low voltage dual 1:5 differential ECL/PECL clock driver
PCK210
Data sheet status
Level
I
Data sheet status[1]
Objective data
Product status[2] [3]
Development
Definitions
This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN).
II
Preliminary data
Qualification
III
Product data
Production
[1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. [3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support -- These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes in the products--including circuits, standard cells, and/or software--described or contained herein in order to improve design and/or performance. When the product is in full production (status `Production'), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
Contact information
For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825
Koninklijke Philips Electronics N.V. 2002 All rights reserved. Printed in U.S.A. Date of release: 12-02
For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
Document order number:
9397 750 10866
Philips Semiconductors
2002 Dec 13 8

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